Display apparatus and method of manufacturing the same

ABSTRACT

A display apparatus includes a base substrate, a first organic insulating layer disposed on the base substrate, and a second conductive pattern disposed on the first organic insulating layer. The conductive pattern includes a first layer that includes a first metal and that has a first thickness. A diffusion layer that makes contact with the first layer and that includes an oxide of the first metal and has a second thickness less than the first thickness is formed at an uppermost portion of the first organic insulating layer.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority under 35 LSC § 119 from, and thebenefit of, Korean Patent Application No. 10-2019-0126435, filed on Oct.11 2019 in the Korean Intellectual Property Office (KIPO), the contentsof which are herein incorporated by reference in their entirety.

BACKGROUND 1. Technical Field

Exemplary embodiments are directed to a display apparatus and a methodof manufacturing the display apparatus. More particularly, embodimentsof the present inventive concept are directed to a display apparatusthat has an improved display quality and a method of manufacturing thedisplay apparatus.

2. Discussion of the Related Art

Recently, technology improves, display products that are smaller;lighter in weight and have superior performance have been produced.Conventional cathode ray tube (CRT) televisions have been widely usedfor display apparatuses with many advantages in terms of performance andprice. Recently, however, a display apparatus such as a plasma displayapparatus, a liquid crystal display apparatus, or an organic lightemitting diode display apparatus, which and have advantages over CRTssuch as miniaturization, light weight, and low power consumption, hasbeen spotlighted.

A display apparatus includes a plurality of conductive layers and aplurality of insulating layers, and a difference in display quality of adisplay apparatus reflects respective process conditions, etc.Accordingly, there have been various efforts to form better qualityconductive layers and insulating layers.

SUMMARY

Some exemplary embodiments provide a display apparatus that haveimproved display quality, which prevent defects from being generated inthe conductive patterns disposed, on an organic insulating layer.

Some exemplary embodiments provide a method of manufacturing the displayapparatus.

According to an exemplary embodiment, a display apparatus includes abase substrate, a first organic insulating layer disposed on the basesubstrate, and a second conductive pattern disposed on the first organicinsulating layer. The second conductive pattern includes, a first layerthat includes a first metal and that has a first thickness. A diffusionlayer that makes contact with the first layer and that includes an oxideof the first metal and that has a second thickness smaller than thefirst thickness is formed at an uppermost portion of the first organicinsulating layer.

In exemplary embodiments, the second thickness is equal to or less than40% that of the first thickness.

In exemplary embodiments, the first metal includes titanium, thediffusion layer includes titanium, oxygen, and fluorine, and the firstorganic insulating layer includes a polyimide-based resin.

In exemplary embodiments, the first thickness is from 41 nm to 45 nm,and the second thickness is 15 nm or less.

In exemplary embodiments, the second conductive pattern includes thefirst layer, a second layer disposed on the first layer, and a thirdlayer disposed on the second layer. The first and third layers includetitanium, and the second layer includes aluminum.

In exemplary embodiments, the display apparatus further includes a firstconductive pattern disposed between the base substrate and the firstorganic insulating layer. The first conductive pattern and the secondconductive pattern at least partially overlap each other.

In exemplary embodiments, the first conductive pattern includes a firstdata line, and the second conductive pattern includes a second data linethat at least partially overlaps the first data line.

In exemplary embodiments, the display apparatus further includes a thinfilm transistor disposed on the base substrate, an insulating layerdisposed between the first organic insulating layer and the basesubstrate and that covers the thin film transistor, a second organicinsulating layer disposed on the second conductive pattern, and a lightemitting structure disposed on the second organic insulating layer.

According to an exemplary embodiment, a method of manufacturing adisplay apparatus include forming a first organic insulating layer on abase substrate, heating a top surface of the first organic insulatinglayer, forming a conductive layer that includes a first layer that has afirst thickness and that includes a first metal on the first organicinsulating layer, and forming a second conductive pattern by patterningthe conductive layer. A diffusion layer that makes contact with thefirst layer that includes an oxide of the first metal and that has asecond thickness that is less than the first thickness is formed at anuppermost portion of the first organic insulating layer.

In exemplary embodiments, the first layer is formed by a sputteringscheme when the conductive layer is formed.

In exemplary embodiments, the method further includes cleaning the topsurface of the first organic insulating layer by using a cleaning fluidbefore heating the top surface of the first organic insulating layer.

In exemplary embodiments, heating the top surface of the first organicinsulating layer includes heat-treating the top surface at a temperaturebetween 60 degrees and 150 degrees for a time of at least 16 seconds.

In exemplary embodiments, the method may further include forming a firstconductive pattern on the base substrate before forming the firstorganic insulating layer. Here, the first conductive pattern and thesecond conductive pattern at least partially overlap each other.

In exemplary embodiments, the method further includes forming a secondorganic insulating layer on the second conductive pattern and forming alight emitting structure on the second organic insulating layer.

In exemplary embodiments, the conductive pattern includes the firstlayer, a second layer formed on the first layer, and a third layerformed on the second layer. The first and third layers include titanium,and the second layer includes aluminum.

In exemplary embodiments, the second thickness is equal to or less than40% that of the first thickness.

In exemplary embodiments, the first metal includes titanium, and thediffusion layer includes titanium, oxygen, and fluorine.

In exemplary embodiments, the first organic insulating layer includes apolyimide-based resin.

According to another exemplary embodiment, a method of manufacturing adisplay apparatus includes forming a first organic insulating layer on abase substrate, forming a conductive layer that includes a first layerthat has a first thickness and that includes a first metal on the firstorganic insulating layer by using a sputtering scheme, and forming asecond conductive pattern by patterning the conductive layer. Adiffusion layer that makes contact with the first layer and thatincludes an oxide of the first metal and that has a second thicknessless than the first thickness is formed at an uppermost portion of thefirst organic insulating layer.

In exemplary embodiments, a plasma having an electric power of 40 kW orless is used in the sputtering scheme.

Therefore, a display apparatus according to exemplary embodimentsincludes a base substrate, an organic insulating layer disposed on thebase substrate, and a conductive pattern disposed on the organicinsulating layer. Here, the conductive pattern includes a first layerthat includes a first metal and has a first thickness. In addition, adiffusion layer that makes contact with the first layer and thatincludes an oxide of the first metal and has a second thickness lessthan the first thickness is formed at an uppermost portion of theorganic insulating layer. Accordingly, defects are prevented fromoccurring in the conductive pattern disposed on the organic insulatinglayer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a display apparatus according to exemplaryembodiments.

FIG. 2 is an equivalent circuit diagram of a typical pixel included in adisplay apparatus of FIG. 1.

FIG. 3 is a cross-sectional diagram of a display apparatus of FIGS. 1and 2.

FIG. 4 is an enlarged diagram of portion ‘A’ in FIG. 3.

FIGS. 5A to 5I are cross-sectional diagrams and enlarged diagrams ofportion ‘A’ that illustrate a method of manufacturing the displayapparatus of FIG. 3.

FIG. 6A is a cross-sectional diagram that illustrates an effect of adisplay apparatus according to exemplary embodiments.

FIG. 6B is a cross-sectional diagram that illustrates a defect generatedin a display apparatus according to a comparative example.

FIG. 7A is a micrograph of a section of a diffusion layer of a displayapparatus according to a comparative example.

FIG. 7B is a micrograph of a section of a diffusion layer of a displayapparatus according to an exemplary embodiment.

FIG. 7C is a micrograph of a section of a diffusion layer of a displayapparatus according to another exemplary embodiment.

FIGS. 5A to 5D are micrographs of sections of diffusion layers of adisplay apparatus according to exemplary embodiments under variousconditions.

FIGS. 9A and 9B are micrographs of sections of diffusion layers of adisplay apparatus according to exemplary embodiments under variousconditions.

FIGS. 10A and 10B are micrographs of sections of diffusion layers of adisplay apparatus according to a comparative example under variousconditions.

FIG. 11 is a flowchart of a method of manufacturing a display apparatusaccording to exemplary embodiments.

FIG. 12 is a flowchart of a method of manufacturing a display apparatusaccording to exemplary embodiments.

FIG. 13 is a block diagram of an electronic apparatus according toexemplary embodiments.

FIG. 14 illustrates an example in which an electronic apparatus of FIG.13 is implemented as a television.

FIG. 14B illustrates at a example in which an electronic apparatus ofFIG. 13 is implemented as a smart phone.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

Hereinafter, exemplary embodiments of the present inventive concept willbe explained in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of a display apparatus according to exemplaryembodiments.

Referring to FIG. 1, according to an embodiment, a display apparatusincludes a display panel 10, a scan driver 20, a data driver 30, anemission control driver 40, and a controller 50.

According to, an embodiment, the display panel 10 includes a pluralityof pixels PX that display an image. For example, the display panel 10includes a plurality of pixels PX located at intersections of scan linesSL1 to SLn and data lines DL1 to DLm, where n and m are integers greaterthan 1, respectively. The structure of the pixel PX will be described indetail with reference to FIG. 4.

According to an embodiment, the scan driver 20 sequentially transmits afirst scan signal to the pixels PX through the scan lines SL1 to SLn,and sequentially transmits a second scan signal to the pixels PX throughinverted scan lines /SL1 to /SLn based on a first control signal CTL1received from the controller. For example, the second scan signal isinverted with respect to the first scan signal.

According to an embodiment, the data driver 30 transmits a data signalto the pixels PX through the data lines DL1 to DLm based on a secondcontrol signal CTL2 received from the controller.

In this case, according to an embodiment, the data lines include a firstdata line DL1 and a second data line DL2. The pixels PX include a firstpixel PX1 and a second, pixel PX2 in the same column. The first dataline DL1 is electrically connected to the first pixel PX1, and thesecond data line DL2 is electrically connected to the second elementPX2. Accordingly, two rows of pixels PX can be simultaneously charged.

Accordingly, According to an embodiment, in the case of 120 Hzhigh-speed driving, a scan load can be increased, so that thescan-on-time (SOT) is reduced and a sufficient compensation time isprovided.

According to an embodiment, the emission control driver 40 sequentiallytransmits an emission control signal to the pixels PX through emissioncontrol lines EM1 to EMn based on a third control signal CTL3 receivedfrom the controller.

According to an embodiment, the controller 50 controls the scan driver20, the data driver 30, and the emission control driver 40. Thecontroller 50 generates the control signals CTL1 to CTL3 thatrespectively control the scan driver 20, the data driver 30, and theemission control driver 40. The first control signal CTL1 forcontrolling the scan driver 20 includes a scan start signal, a scanclock signal, etc. The second control signal CTL2 for controlling thedata driver 30 includes image data, a horizontal start signal etc. Thethird control signal CTL1 for controlling the emission control driver 40includes an emission, control start signal, an emission control clocksignal, etc.

In addition, According to an embodiment, a display apparatus furtherincludes a power supply unit that supplies a first power supply voltageELVDD, a second power supply voltage ELVSS, and an initializationvoltage VINT to the display panel 10.

FIG. 2 is an equivalent circuit diagram of a typical pixel included in adisplay apparatus of FIG.

Referring to FIG. 2, according to an embodiment, the pixel PX includesfirst to seventh transistors T1 to T7, a storage capacitor CST, and anorganic light emitting diode OLED. A pixel Px_(i,j) would be located inan at i^(th) pixel row, where i is an integer between 1 and n, and aj^(th) pixel column, where j is an integer between 1 and m.

According to an embodiment, the first transistor T1 is a drivingtransistor that provides to the organic light emitting diode OLED adriving current that corresponds to the data signal. The firsttransistor T1 includes a gate electrode connected to a first node N1. afirst electrode connected to a second node N2, and a second electrodeconnected to a third node N3.

According to an embodiment, the second transistor 12 provides the datasignal to the first transistor T1 in response to a first scan signalGS1. In an exemplary embodiment, the second transistor T2 includes agate electrode that receives the first scan signal GSI from an i^(th)scan line SLi, a first electrode that receives the data signal from aj^(th) data line DLj, and a second electrode connected to the firstelectrode of the first transistor 11 through the second node N2.

According to an embodiment, the third transistor 13 connects the secondelectrode of the first transistor T1 to the gate electrode of the firsttransistor T1 in response to a second scan signal GS2. In an exemplaryembodiment, the third transistor 13 includes a gate electrode thatreceives the second scan signal GS2 from an i^(th) inverted scan line/SLi, a first electrode connected to the second electrode of the firsttransistor T1 through the third node N3, and a second electrodeconnected to the gate electrode of the first transistor T1 through thefirst node N1.

According to an embodiment, the fourth transistor T4 transmits theinitialization voltage VINT to the gate electrode of the firsttransistor T1 in response to a third scan signal GS3. In an exemplaryembodiment, the fourth transistor T4 includes a gate electrode thatreceives the third scan signal GS3 from an (i−1)^(th) inverted scan line/SL(i−1), a first electrode connected to the initialization voltageVINT, and a second electrode connected to the gate electrode of thefirst transistor T1 through the first node N1.

According to an embodiment, the fifth transistor TS transmits the firstpower supply voltage ELVDD to the first electrode of the firsttransistor T1 in response to an emission control signal. In an exemplaryembodiment, the fifth transistor T5 includes a gate electrode thatreceives the emission control signal from an emission control line EMi,a first electrode connected to the first power supply voltage ELVDD, anda second electrode connected to the first electrode of the firsttransistor T1 through the second node N2.

According to an embodiment, the sixth transistor 16 connects the secondelectrode of the first transistor TI to a first electrode of the organiclight emitting diode OILED in response to the emission control signal.In an exemplary embodiment, the sixth transistor T6 includes a gateelectrode that receives the emission control signal from the i^(th)emission control line EMi, a first electrode connected to the secondelectrode of the first transistor T1 through the third node N3, and asecond electrode connected to the first electrode of the organic lightemitting diode OLED through a fourth node N4.

According to an embodiment, the seventh transistor T7 transmits theinitialization voltage VINT to the first electrode of the organic lightemitting diode OLED in response to a fourth scan signal GS4. In anexemplary embodiment, the seventh transistor T7 includes a gateelectrode that receives the fourth scan signal GS4 from the (i−1)^(th)inverted scan line /SL(i−1), a first electrode connected to theinitialization voltage VINT, and a second electrode connected to thefirst electrode of the organic light emitting diode OLED through thefourth node N4.

In this case, according to an embodiment, each of the first transistorT1, the second transistor T2, the fifth transistor TS, and the sixthtransistor T6 is a polysilicon (poly-Si) P-type thin film transistor.Each of the third transistor T3, the fourth transistor T4, and theseventh transistor 17 is an oxide N-type thin film transistor.

According to an embodiment, the storage capacitor CST includes a firstelectrode connected to the first power supply voltage ELVDD and a secondelectrode connected to the gate electrode of the first transistor T1through the first node N1.

FIG. 3 is a cross-sectional diagram of a display apparatus of FIGS. 1and 2.

Referring to FIG. 3, according to an embodiment, the display apparatusincludes abase substrate 100, a buffer layer 110, an active pattern ACT,a first insulating layer 120, a first gate conductive pattern, a secondinsulating layer 130, a second gate conductive pattern, a thirdinsulating layer 140, a first source drain conductive pattern, a firstorganic insulating layer VIM , a second source drain conductive pattern,a second organic insulating layer VIA2, a pixel defining layer PDL alight emitting structure 180, and a thin film encapsulation layer TFE.

According to an embodiment, the base substrate 100 may be formed of atransparent or opaque material. For example, the base substrate 100 maybe one of a quartz substrate, a synthetic quartz substrate, a calciumfluoride substrate, a fluorine-doped quartz substrate (F-doped quartzsubstrate), a soda lime glass substrate, or a non-alkali glasssubstrate, etc. In some exemplary embodiments, the base substrate 100 isa flexible transparent resin substrate. Examples of flexible transparentresin substrate suitable for the base substrate 100 include arepolyimide substrates.

According to an embodiment, the buffer layer 110 is disposed over thebase substrate 100. The buffer layer 110 prevents metal atoms orimpurities from diffusing from the base substrate 100 into the activepattern ACT, and controls a heat transfer rate during a crystallizationprocess that forms the active pattern ACT to obtain a substantiallyuniform active pattern ACT. In addition, when a surface of the basesubstrate 100 is not uniform, the buffer layer improves the flatness ofthe surface of the base substrate 100.

According to an embodiment, the active pattern ACT is disposed on thebuffer layer 110. The active pattern ACT includes poly crystal silicon.The active pattern ACT includes a drain region and a source region thatare doped with impurities, and a channel region disposed between thedrain region and the source region. The poly crystal silicon is formed bdepositing amorphous silicon and crystallizing the amorphous silicon. Inanother exemplary embodiment, the active pattern ACT includes an oxidesemiconductor. The oxide semiconductor is a semiconductor oxide layerthat includes a binary compound (AB_(x)), a ternary compound(AB_(x)C_(y)), or a quaternary compound (AB_(x)C_(y)D_(z)), that containindium (In), zinc (Zn), (Ga), tin (Sn), titanium (Ti), aluminum (Al),hafnium (Hf), zirconium (Zr), or magnesium (Mg), etc.

According to an embodiment, the first insulating layer 120 may bedisposed on the buffer layer 110 on which the active pattern ACT isdisposed. The first insulating layer 120 covers the active pattern ACT.The first insulating layer 120 includes an inorganic insulating materialsuch as a silicon compound or a metal oxide.

According to an embodiment, the first gate conductive pattern isdisposed on the first insulating layer 120. The first gate conductivepattern includes a gate electrode GE. The first gate conductive patternfurther includes a signal wire such as a gate line that drives thedisplay apparatus. The first gate conductive pattern is formed from ametal, an alloy, a metal nitride, a conductive metal oxide, or atransparent conductive material, etc.

According to an embodiment, the second insulating layer 130 is disposedon the first insulating layer 120 on which the first gate conductivepattern is disposed. The second insulating layer 130 covers the firstgate conductive pattern. The second insulating layer 130 includes aninorganic insulating material such as a silicon compound or a metaloxide.

According to an embodiment, the second gate conductive pattern isdisposed on the second insulating layer 130. The second gate conductivepattern includes a storage electrode STE and a signal line. The storageelectrode STE overlaps the gate electrode GE to form a storagecapacitor. The second gate conductive pattern is termed from a metal, analloy, a metal nitride, a conductive metal oxide, or a transparentconductive material, etc.

According to an embodiment, the third insulating layer 140 is disposedon the second insulating layer 130 on which the second gate conductivepattern is disposed. The third insulating layer 140 covers the secondgate conductive pattern on the second insulating layer 130, and providesa flat top surface without creating a step around the second gateconductive pattern, The third insulating layer 140 includes an inorganicinsulating material such as a silicon compound or a metal oxide.

According to an embodiment, the first source drain conductive pattern isdisposed on the third insulating layer 140. The first source drainconductive pattern includes a source electrode SE, a drain electrode DE,and a first data line DLI. The first source drain conductive pattern isformed from a metal, an alloy, a metal nitride, a conductive metaloxide, or a transparent conductive material, etc. The first source drainconductive pattern includes a plurality of layers. For example, thefirst source drain conductive pattern includes a titanium (Ti) layer anda molybdenum (Mo) layer disposed on the titanium layer to form a Ti/Mostructure. Alternatively, the first source drain conductive patternincludes a titanium (Ti) layer, an aluminum (Al) layer disposed on thetitanium layer, and a titanium (Ti) layer disposed on the aluminum layerto from a Ti/Al/Ti structure.

According to an embodiment, the active pattern ACT, the gate electrodeGE, the source electrode SE, and the drain electrode DE form the thinfilm transistor TFT.

According to an embodiment, the thin film transistor TFT has a top gatestructure, but embodiments are not limited thereto, and in otherembodiments, the thin film transistor TFT has a bottom gate structure.

According to an embodiment, the first organic insulating layer VIA1 isdisposed on the third insulating layer 140 on which the first sourcedrain conductive pattern is disposed. The first organic insulating layerVIA1 covers the first source drain conductive pattern. The first organicinsulating layer VIA1 may have a single-layer structure, or may alsohave a multilayer structure that includes at least two insulatinglayers. The first organic insulating layer VIA1 is formed from anorganic material such as a photoresist, an acryl-based resin, apolyimide-based resin, a polyimide-based resin, or a siloxane-basedresin.

According to an embodiment, the second source drain conductive patternis disposed on the first organic insulating layer VIA1. The secondsource drain conductive pattern includes a contact pad CP and a seconddata line DL2. The second data line DL2 at least partially overlaps thefirst data line DL1. The second source drain conductive pattern isformed from a metal, an alloy, a metal nitride, a conductive metaloxide, or a transparent conductive material, etc. The second sourcedrain conductive pattern is formed of a plurality of layers. Forexample, the second source drain conductive pattern includes a titanium(Ti) layer and a molybdenum (Mo) layer disposed on the titanium layer toform a Ti/Mo structure. Alternatively, the second source drainconductive pattern includes a titanium (Ti) layer, an aluminum (Al)layer disposed on the titanium layer, and a titanium (Ti) layer disposedon the aluminum layer to form a structure.

According to an embodiment, the second organic insulating layer VIA1, isdisposed on the first organic insulating layer VIA1 on which the secondsource drain conductive pattern is disposed. The second organicinsulating layer VIA2 covers the second source drain conductive pattern.The second organic insulating layer VIA2 may have a single-layerstructure, or may also have a multilayer structure that includes atleast two insulating layers. The second organic insulating layer VIA2 isformed from an organic material such as a photoresist, an acryl-basedresin, a polyimide-based resin, a polyamide-based resin, or asiloxane-based resin.

According to an embodiment, the light emitting structure 180 includes afirst electrode 181, a light emitting layer 182, and a second electrode183.

According to an embodiment, the first electrode 181 is disposed on thesecond organic insulating layer VIA2. Depending on a light emittingscheme of the display apparatus, the first electrode 181 is formed fromeither a reflective material or a transmissive material. In exemplaryembodiments, the first electrode 181 may have a single-layer structureor a multilayer structure that includes at least one of a metal film, analloy film, a metal nitride film, a conductive metal oxide film, or atransparent conductive material film.

According to an embodiment, the pixel defining layer PDL is disposed onthe second organic insulating layer VIA2 on which the first electrode181 is disposed. The pixel defining layer PDL is formed from an organicmaterial or an inorganic material, etc. For example, the pixel defininglayer PDL is formed from a photoresist, a polyacryl-based resin, apolyimide-based resin, an acryl-based resin, or a silicon compound, etc.In exemplary embodiments, the pixel defining layer PDL is etched to forman opening which partially exposes the first electrode 181. An emissionarea and a non-emission area of the display apparatus are defined by theopening of the pixel defining layer. For example, a portion where theopening of the pixel defining layer PDL is located corresponds to theemission area, and the non-emission area corresponds to a portionadjacent to the opening of the pixel defining layer PDL.

According to an embodiment, the light emitting layer 182 is disposed onportion of the first electrode 181 that is exposed through the openingof the pixel defining layer PDL. In addition, the light emitting layer182 extends onto a side wall of the opening of the pixel defining layerPDL. In exemplary embodiments, the light emitting layer 182 has amultilayer structure that includes an organic light emitting layer EL, ahole injection layer HIL, a hole transport layer HTL, an electrontransport layer ETL, and an electron injection layer EIL, etc. Inanother exemplary embodiment, the layers of the light emitting layer 182except for the organic light emitting layer, i.e., the hole injectionlayer, the hole transport layer, the electron transport layer, and theelectron injection layer, are commonly formed to correspond to theplurality of pixels. The organic light emitting layer of the lightemitting layer 182 is formed from light emitting materials that generatedifferent colors, such as red light, green light, or blue lightaccording to each pixel of the display apparatus. According to someexemplary embodiments, the organic light emitting layer of the lightemitting layer 182 has a structure in which a plurality of lightemitting materials for emitting different colored light, such as redlight, green light, and blue light, are stacked to emit white light. Inthis case, the above light emitting structures are commonly formed tocorrespond to the pixels, and the pixels are classified by a colorfilter layer.

According to an embodiment, the second electrode 183 is disposed on thepixel defining layer PDL and the light emitting layer 182. Depending ona light emitting scheme of the display apparatus, the second electrode183 may include a transmissive material or a reflective material. Inexemplary embodiments, the second electrode 183 may also have asingle-layer structure or a multiplayer structure that includes at leastone of a metal film, an alloy film, a metal nitride film, a conductivemetal oxide film, or a transparent conductive material film.

According to an embodiment, the thin film encapsulation layer TFE isdisposed on the second electrode 183. The thin film encapsulation layerTFE prevents external moisture and oxygen from penetrating into thedisplay apparatus. The thin film encapsulation layer TFE includes atleast one organic layer and at least one inorganic layer. The at leastone organic layer and the at least one inorganic layer are alternatelystacked on each other. For example, the thin film encapsulation layerTFE includes two inorganic layers and one organic layer disposedtherebetween, but embodiments are not limited thereto. In anotherexemplary embodiment, a sealing substrate is provided instead of thethin film encapsulation layer to block external air, and moisture frompenetrating into the display apparatus.

FIG. 4 is an enlarged diagram of portion ‘A’ in FIG. 3.

Referring to FIGS. 3 and 4, according to an embodiment, the first sourcedrain conductive pattern includes a plurality of layers. For example,the first source drain conductive pattern includes a first layer 210that includes titanium, a second layer 220 disposed on the first layer210 and that includes aluminum, and a third layer 230 disposed on thesecond layer 220 and that includes titanium.

According to an embodiment, the second source drain conductive patternincludes a first layer 310, a second layer 320, and a third layer 330.The first layer 310 includes a first metal and has a first thickness t1.The first metal includes titanium. The second layer 320 is disposed onthe first layer 310. The second layer 320 includes aluminum. The thirdlayer 330 is disposed on the second layer 320. The third layer 330includes titanium.

According to an embodiment, a diffusion layer DFL is formed on anuppermost portion of the first organic insulating layer VIA1 and underthe first layer 310. The diffusion layer DFL includes an oxide of thefirst metal and has a second thickness t2 less than the first thicknesst1. For example, the diffusion layer DFL includes titanium, oxygen, andfluorine.

According to an embodiment, the second thickness t2 is less than orequal to about 40% that of the first thickness t1. When the diffusionlayer DFL is too thick, a portion of the first layer 310, which isremoved when patterning the second source drain conductive pattern thatincludes the first layer 310 through an etching process, may remainwithout being removed due to strong bonding with the diffusion layer DFLso as to form a residue pattern, thereby causing defects. Therefore, thediffusion layer DFL may be minimized, and the second thickness t2 of thediffusion layer DFL may be equal to or less than 40% that of the firstthickness t1.

FIGS. 5A to 5I are cross-sectional diagram and enlarged diagrams ofportion ‘A’ that illustrate a method of manufacturing the displayapparatus of FIG. 3.

Referring to FIG. 5A, according to an embodiment, a buffer layer 110 isformed on a base substrate 100. An active pattern ACT of a thin filmtransistor TFT is formed on the buffer layer 110. A first insulatinglayer 120 is formed on the buffer layer 110 and the active pattern ACT.A first gate conductive pattern that includes a gate electrode GE of thethin film transistor TFT is formed on the first insulating layer 120. Asecond insulating layer 130 is formed on the first insulating layer 120and the first gate conductive pattern. A second gate conductive patternthat includes a storage electrode STE is formed on the second insulatinglayer 130. A third insulating layer 140 is formed on the secondinsulating layer 130 and the second gate conductive pattern.

According to an embodiment, a first source drain conductive pattern thatincludes a source electrode SE and a drain electrode DE of the thin filmtransistor TFT and a first data line DLI is formed, on the thirdinsulating layer 140. The first source drain conductive pattern includesa plurality of layers. For example, the first source drain conductivepattern includes a first layer that includes titanium, a second layerdisposed on the first layer and that includes aluminum, and a thirdlayer disposed on the second layer and that includes titanium.

Referring, to FIG. 5B, according to an embodiment, a first organicinsulating layer VIA1 is formed on the third insulating layer 140 andthe first source drain conductive pattern. The first organic insulatinglayer VIA1 includes a polyimide-based resin. After the first organicinsulating layer VIA1 is formed, a top, surface of the first organicinsulating layer VIA1 is cleaned by using a cleaning fluid. For example,the top surface of the first organic insulating layer VIA1 is cleaned byusing de-ionized water (DI water), etc.

Referring to FIG. 5C, according to an embodiment, the top surface of thefirst organic insulating layer VIA1 is heat-treated by applying heat tothe top surface of the first organic insulating layer VIA1. In thiscase, the top surface of the first organic insulating layer VIA1 isheat-treated at a temperature between 60 degrees and 150 degrees for atime of 16 seconds or more. Accordingly, foreign substances, such as anycleaning fluid remaining on the top surface of the first organicinsulating layer VIA1, are removed without degrading characteristics ofthe display apparatus.

Referring to FIGS. 5D and 5E, according to an embodiment, a first layer310 is formed on the first organic insulating layer VIA1 The first layer310 has a first thickness t1 and includes a first metal. The first metalincludes titanium. The first layer 310 is formed by a sputtering scheme.In this case, the first metal of the first layer 310 diffuses into thefirst organic insulating layer VIA1. Accordingly, a diffusion layer DFLthat includes an oxide of the first metal and has a second thickness t2less than the first thickness is formed at an uppermost portion of thefirst organic insulating layer VIA1, which makes contact with the firstlayer 310. The diffusion layer DFL includes the first metal, oxygen, andfluorine. For example, when the first metal includes titanium, thediffusion layer DFL includes a compound (TiO_(x)F_(y)) that includestitanium, oxygen, and fluorine.

According to an embodiment, the second thickness t2 is equal or lessthan 40% that of the first thickness t1. For example, the secondthickness t2 is 26% to 28% that of the first thickness t1. In anexemplary embodiment, the first thickness t1 is from about 41 nm toabout 45 nm (nanometer), and the second thickness t2 is 15 nm or less.For example, the second thickness is 12 nm.

Referring to FIGS. 5F and 5G, according to an embodiment, a second layer320 and a third layer 330 are sequentially formed on the first layer310. The second layer 320 and the third layer 330 are continuouslyformed subsequent to forming the first layer 310, and are formed byanother sputtering scheme. The second layer 320 includes aluminum. Thethird layer 330 includes titanium.

Referring to FIG. 5H, according to an embodiment, a second source drainconductive pattern that includes a second data line DL2 and a contactpad CP is formed by patterning the first to third layers 310, 320, and330. For example, the second source drain conductive pattern is formedby a photolithography process or an etching process that uses anadditional etching mask.

According to an embodiment, since the second thickness t2 of thediffusion layer DFL is less than or equal to 40% of the first thicknesst1 of the first layer 310, it is possible to remove all of thoseportions of the first layer 310 that are to be removed during thepatterning process, which prevents a residue pattern that causesdefects.

Referring to FIG. 5I, according to an embodiment, a second organic,insulating layer VIA2 is formed on the second source drain conductivepattern. A first electrode 181 of a light emitting structure 180 isformed on the second organic insulating layer VIA2. A pixel defininglayer PDL is formed on the second organic insulating layer VIA2 and onedges of the first. electrode 181. A light emitting layer 182 of thelight emitting structure 180 is formed on the first electrode 181, and asecond electrode 183 of the light emitting structure 180 is formed onthe light emitting layer 182 and the pixel defining layer PDL. A thinfilm encapsulation layer TFE is formed on the light emitting structure180. Accordingly, a display apparatus according to an embodiment ismanufactured.

FIG. 6A is a cross-sectional diagram that illustrates an effect of adisplay apparatus according to exemplary embodiments, and FIG. 6B is across-sectional diagram that illustrates a defect generated in a displayapparatus according to a comparative example.

Referring to FIG. 6A, according to an embodiment, since the diffusionlayer DFL has the second thickness t2 less than the first thickness t1of the first layer 310 of the second source drain conductive pattern, noresidue pattern is formed between adjacent patterns ADJ while etchingthe first layer 310, so that defect can be prevented.

In contrast, referring to FIG. 6B, according to a comparative example,the top surface of the first organic insulating layer VIA1 is not heatedafter the first organic insulating layer VIA1 is formed, so that thediffusion layer DFL has a third thickness t3 greater than the secondthickness t2. Accordingly, a residue pattern RD forms between theadjacent patterns ADJ while etching the first layer 310, thereby causingdefects.

It was found that a titanium oxide (TiO_(x)) component of the diffusionlayer DFL is more strongly bonded with the polyimide-based resin thantitanium (Ti), thereby contributing to the formation of the residuepanel n during the etching process.

FIG. 7A is a micrograph of a section of a diffusion layer of a displayapparatus according to a comparative example, FIG. 7B is a micrograph ofa section of a diffusion layer of a display apparatus according to anexemplary embodiment, and FIG. 7C is a micrograph of a section of adiffusion layer of a display apparatus according to another exemplaryembodiment.

Referring to FIG. 7A, according to a comparative example in which noheat treatment process is performed, it is found that a relatively thickTiO_(x)F_(y) component layer, which is part of a diffusion layer formedon an uppermost portion of an organic insulating layer VIA, is formedbetween the organic insulating layer VIA and a titanium layer Ti.

Referring to FIG. 7B, according to an exemplary embodiment in which aheat treatment process is performed, it is found that the TiO_(x)F_(y)component layer, which is the diffusion layer, is relatively thin ascompared with the comparative example.

Referring to FIG. 7C, according to another exemplary embodiment in whicha low-power sputtering process is performed, it is found that theTiO_(x)F_(y) component layer, which is the diffusion layer, isrelatively thin as compared with the comparative example (seedescription of FIG. 12).

FIGS. 8A to 8D are micrographs of sections of diffusion layer of adisplay apparatus according to exemplary embodiments under variousconditions.

According to embodiments, FIGS. 8A and 8B show cases where the heattreatment process is performed at 80 degrees for 16 seconds undermutually different conditions. According to FIG. 8A, the first thicknessof the first layer was 36.23 nm, and the second thickness of thediffusion layer was 38.02 nm. According to FIG. 8B, the first thicknessof the first layer was 37.49 nm, and the second thickness of thediffusion layer was 27.14 nm.

According to embodiments FIGS. 8C and 8D show cases where the heattreatment process is performed at 80 degrees for 32 seconds undermutually different conditions. According to FIG. 8C, the first thicknessof the first layer was 43.80 nm, and the second thickness of thediffusion layer was 9.83 nm. According to FIG. 5D, the first thicknessof the first layer was 42.24 nm, and the second thickness of thediffusion layer was 11.42 nm.

Accordingly, according to embodiments, it was found that the heattreatment process can be performed at a temperature of from 60 degreesto 150 degrees for a time of 16 seconds or more. For example, the heattreatment process can be performed at 80 degrees for a time of from 16seconds to 45 seconds.

FIGS. 9A and 9B are micrographs of sections of diffusion layers of adisplay apparatus according to exemplary embodiments under variousconditions.

According to embodiments, FIGS. 9A and 9B show cases where the firstlayer is formed by using a low-power sputtering scheme under mutuallydifferent conditions. Plasma having an electric power of 30 kW is usedin the sputtering scheme (see description of FIG. 12).

According to FIG. 9A, according to an embodiment, the first thickness ofthe first layer was 44.04 nm, and the second thickness of the diffusionlayer was 17.26 nm.

According to FIG. 9B according to an embodiment, the first thickness ofthe first layer was 41.68 nm, and the second thickness of the diffusionlayer was 9.75 nm.

FIGS. 10A and 10B are micrographs of sections of diffusion layers of adisplay apparatus according to a comparative example under variousconditions.

FIGS. 10A and 10B show cases where the first layer is formed by using ageneral-power sputtering scheme under mutually different conditions.Plasma having an electric power of 80 kW is used in the sputteringscheme.

According to FIG. 10A, the first thickness of the first layer was 31.12nm, and the second thickness of the diffusion layer was 25.56 nm.

According to FIG. 10B, the first thickness of the first layer was 31.72nm, and the second thickness of the diffusion layer was 29.31 nm.

Accordingly, it was found that plasma having an electric power of 40 kWor less can be used in the sputtering scheme. For example, plasma havingan electric power of 30 kW is used in the sputtering scheme.

FIG. 11 is a flowchart of a method of manufacturing a display apparatusaccording to exemplary embodiments.

Referring to FIG. 11, a method according to an embodiment includesforming a thin film transistor on a base substrate (S100), forming aninsulating layer on the thin film transistor (S200), forming a firstsource drain pattern on the insulating layer (S300), forming an organicinsulating layer on the first source drain pattern (S400), heating a topsurface of the organic insulating layer (S500), forming a conductivelayer on the organic insulating layer (S600), and patterning theconductive layer (S700). A method of FIG. 11 further includes cleaningthe top surface of the organic insulating layer (S450) by using acleaning fluid before the top surface of the organic insulating layer isheated.

Since a method of FIG. 11 is substantially the same as a methoddescribed with reference to FIGS. 5A to 5I, duplicated descriptionrelated thereto will be omitted.

FIG. 12 is a flowchart diagram illustrating a method of manufacturing adisplay apparatus according to exemplary embodiments.

Referring to FIG. 12, a method according to another embodiment includesforming a thin film transistor on a base substrate (S100), forming aninsulating layer on the thin film transistor (S200), forming a firstsource drain pattern on the insulating layer (S300), forming an organicinsulating layer on the first source drain pattern (S400), forming aconductive layer on the organic insulating layer by using low-powersputtering (S650), and patterning the conductive layer (S700).

According to an embodiment, when a conductive layer is funned on anorganic insulating layer by a low-power sputtering (S650), theconductive layer is finned on the organic insulating layer by thesputtering scheme, where the conductive layer includes a first layerthat has a first thickness and includes a first metal. In this case, aplasma having an electric power of 40 kW or less is used in thesputtering scheme.

A method or FIG. 12 is substantially the same as a method described withreference to FIG. 11 except that the first layer is formed by alow-power sputtering scheme instead of by heating the top surface of theorganic insulating layer, so a detailed descriptions thereof will beomitted.

FIG. 13 is a block diagram of an electronic apparatus according toexemplary embodiments, FIG. 14A illustrates an example in which anelectronic apparatus of FIG. 13 is implemented as a television, and FIG.14B illustrates an example in which an electronic apparatus of FIG. 13is implemented as a smart phone.

Referring to FIGS. 13 to 14B, according to an embodiment, an electronicapparatus 500 includes a processor 510, a memory device 520, a storagedevice 530, an input/output (I/O) device 540, a power supply 550 and adisplay apparatus 560. Here, the display apparatus 560 is a displayapparatus of FIG. 1. In addition, the electronic apparatus 500 furtherincludes a plurality of ports for communicating with, respectively, avideo card, a sound card, a memory card, a universal serial bus (USB)device, and other electronic apparatuses, etc. In an exemplaryembodiment, as illustrated in FIG. 14A, the electronic apparatus 500 isa television. In another exemplary embodiment, as illustrated in FIG.14B, the electronic apparatus 500 is a smart phone. However, embodimentsof the electronic apparatus 500 are not limited thereto. For example,the electronic apparatus 500 may be a cellular phone, a video phone, asmart pad, a smart watch, a tablet PC, a car navigation system, acomputer monitor, a laptop, or a head mounted display (HMD) apparatus,etc.

According to an embodiment, the processor 510 performs various computingfunctions. The processor 510 may be, any one of a micro processor, acentral, processing unit (CPU) or an application processor (AP), etc.The processor 510 is coupled to other components via an address bus, acontrol bus, or a data bus, etc. Further, the processor 510 is coupledto an extended bus such as a peripheral component interconnection (PCI)bus. The memory device 520 stores data for operations of the electronicapparatus 500. For example, the memory device 520 includes at least onenon-volatile memory device such as an erasable programmable read-onlymemory (EPROM) device, an electrically erasable programmable read-onlymemory (EEPROM) device, a flash memory device, a phase change randomaccess memory (PRAM) device, a resistance random access memory (RRAM)device, a nano floating gate memory (NFGM) device, a polymer randomaccess memory (PoRAM) device, a magnetic random access memory (MRAM)device, or a ferroelectric random access memory (FRAM) device, etc., orat least one volatile memory device such as a dynamic random accessmemory (DRAM) device, a static random access memory (SRAM) device, or amobile DRAM device, etc. The storage device 530 is one or more of asolid state drive (SSD) device, a hard disk drive (HDD) device, or aCD-ROM device, etc. The 110 device 540 includes an input device such asa keyboard, a keypad, a mouse device, a touch-pad, a touch-screen, etc.,and an output device such as a printer, a speaker, etc. The power supply550 provides power for operations of The electronic apparatus 500.

According, to an embodiment, the display apparatus 560 is coupled toother components via the buses or other communication links. In someexemplary embodiments, the I/O device 540 includes the display apparatus560. As described above, the display apparatus 560 includes a basesubstrate, an organic insulating layer disposed on the base substrate,and a conductive pattern disposed on the organic insulating layer. Here,the conductive pattern includes a first layer that includes a firstmetal and that has a first thickness. In addition, a diffusion layerthat makes contact with the first layer and that includes an oxide ofthe first metal and that has a second thickness less than the firstthickness is formed at an uppermost portion of the organic insulatinglayer. Accordingly, defects can be prevented from forming in theconductive pattern disposed on the organic insulating layer. Since theseare described above, a duplicated description related thereto will beomitted.

Embodiments of the present inventive concept can be incorporated into adisplay apparatus and an electronic apparatus that includes the displayapparatus. For example, embodiments of the present inventive concept canbe incorporated into a smart phone, a cellular phone, a video phone, asmart pad, a smart watch, a tablet PC, a car navigation system, atelevision, a computer monitor, a laptop, or a head mounted displayapparatus, etc.

The foregoing is illustrative of exemplary embodiments and is not to beconstrued as limiting thereof. Although a few exemplary embodiments havebeen described, those skilled in the art will readily appreciate thatmany modifications are possible in the exemplary embodiment, withoutmaterially departing from the novel teachings and advantages ofembodiments of the present inventive concept. Accordingly, all suchmodifications are intended to be included within the scope ofembodiments of the present inventive concept as defined in the claims.Therefore, it is to be understood that the foregoing is illustrative ofvarious exemplary embodiments and is not to be construed as limited tothe specific exemplary embodiments disclosed, and that modifications tothe disclosed exemplary embodiments, as well as other exemplaryembodiments, are intended to be included within the scope of theappended claims.

What is claimed is:
 1. A display apparatus, comprising: a basesubstrate; a first organic insulating layer disposed on the basesubstrate; and a second conductive pattern disposed on the first organicinsulating layer, wherein the second conductive pattern includes a firstlayer that includes a first metal and that has a first thickness, andwherein a diffusion layer that makes contact with the first layer andthat includes an oxide of the first metal and that has a secondthickness less than the first thickness is formed at an uppermostportion of the first organic insulating layer.
 2. The display apparatusof claim 1, wherein the second thickness is equal to or less than 40%that of the first thickness.
 3. The display apparatus of claim 1,wherein the first metal includes titanium, the diffusion layer includestitanium, oxygen, and fluorine, and the first organic insulating layerincludes a polyimide-based resin.
 4. The display apparatus of claim 1,wherein the first thickness is from 41 nm to 45 nm, and the secondthickness is 15 nm or less.
 5. The display apparatus of claim 1, whereinthe second conductive pattern includes the first layer, a second layerdisposed on the first layer, and a third layer disposed on the secondlayer, wherein the first and third layers include titanium, and thesecond layer includes aluminum.
 6. The display apparatus of claim 1,further comprising: a first conductive pattern disposed between the basesubstrate and the first organic insulating layer, wherein the firstconductive pattern and the second conductive pattern at least partiallyoverlap each other.
 7. The display apparatus of claim 6, wherein thefirst conductive pattern includes a first data line, and wherein thesecond conductive pattern includes a second data line that at leastpartially overlaps the first data line.
 8. The display apparatus ofclaim 6, further comprising: a thin film transistor disposed on the basesubstrate; an insulating layer disposed between the first organicinsulating layer and the base substrate and that covers the thin filmtransistor; a second organic insulating layer disposed on the secondconductive pattern; and a light emitting structure disposed on thesecond organic insulating layer.
 9. A method of manufacturing a displayapparatus, the method comprising: forming a first organic insulatinglayer on a base substrate; heating a top surface of the first organicinsulating layer; forming a conductive layer that includes a first layerthat has a first thickness and that includes a first metal, on the firstorganic insulating layer; and forming a second conductive pattern bypatterning the conductive layer, wherein a diffusion layer that makescontact with the first layer and that includes an oxide of the firstmetal and that has a second thickness less than the first thickness isformed at an uppermost portion of the first organic insulating layer.10. The method of claim 9, wherein the first layer is formed by asputtering scheme when the conductive layer is formed.
 11. The method ofclaim 9, further comprising: cleaning the top surface of the firstorganic insulating layer by using a cleaning fluid before heating thetop surface of the first organic insulating layer.
 12. The method ofclaim 11, wherein heating the top surface of the first organicinsulating layer comprises heat-treating the top surface at atemperature between 60 degrees and 150 degrees for a time of at least 16seconds.
 13. The method of claim 9, further comprising: forming a firstconductive pattern on the base substrate before forming the firstorganic insulating layer, wherein the first conductive pattern and thesecond conductive pattern at least partially overlap each other.
 14. Themethod of claim 9, further comprising: forming a second organicinsulating layer on the second conductive pattern; and forming a lightemitting structure on the second organic insulating layer.
 15. Themethod of claim 9, wherein the second conductive pattern includes thefirst layer, a second layer formed on the first layer, and a third layerformed on the second layer, wherein the first and third layers includetitanium, and the second layer includes aluminum.
 16. The method ofclaim 9, wherein the second thickness is equal to or less than 40% thatof the first thickness.
 17. The method of claim 9, wherein the firstmetal includes titanium, and the diffusion layer includes titanium,oxygen, and fluorine.
 18. The method of claim 9, wherein the firstorganic insulating layer includes a polyimide-based resin.
 19. A methodof manufacturing a display apparatus, the method comprising: forming afirst organic insulating layer on a base substrate; forming a conductivelayer that includes a first layer that has a first thickness and thatincludes a first metal on the first organic insulating layer by using asputtering scheme; and forming a second conductive pattern by patterningthe conductive layer, wherein a diffusion layer that makes contact withthe first layer and that includes an oxide of the first metal and thathas a second thickness less than the first thickness is formed at anuppermost portion of the first organic insulating layer.
 20. The methodof claim 19, wherein a plasma having an electric, power of 40 kW or lessis used in the sputtering scheme.